The majority of the solar cells currently produced are based upon crystalline silicon.
A conventional solar cell with a p-type (p-doped) silicon base has an n-type (n-doped) emitter in the form of an n-type diffusion layer on its front-side. Such conventional silicon solar cell structure uses a negative electrode to contact the front-side or sun side of the cell, and a positive electrode on the back-side. It is well known that radiation of an appropriate wavelength falling on a p-n junction of a semiconductor body serves as a source of external energy to generate electron-hole pairs in that body. The potential difference that exists at a p-n junction, causes holes and electrons to move across the junction in opposite directions, thereby giving rise to flow of an electric current that is capable of delivering power to an external circuit. Most solar cells are in the form of a silicon wafer that has been metallized, i.e., provided with metal contacts which are electrically conductive. Typically, the front-side metallization is in the form of a so-called H pattern, i.e. in the form of a silver grid cathode comprising thin parallel finger lines (collector lines) and busbars intersecting the finger lines at right angle, whereas the back-side metallization is an aluminum anode in electric connection with silver or silver/aluminum busbars or tabs. The photoelectric current is collected from the front-side busbars and the back-side busbars or tabs.
Alternatively, a reverse solar cell structure with an n-type silicon base is also known. Such cells have a front p-type silicon surface (front p-type emitter) with a positive electrode on the front-side and a negative electrode to contact the back-side of the cell. Solar cells with n-type silicon bases (n-type silicon solar cells) can in theory produce absolute efficiency gains of up to 1% compared to solar cells with p-type silicon bases owing to the reduced recombination velocity of electrons in the n-doped silicon.
MWT silicon solar cells are examples of silicon solar cells having another cell design than the silicon solar cells described above. MWT silicon solar cells are well-known to the skilled person (cf. for example, the website “http://www.sollandsolar.com/IManager/Content/4680/qfl7/mt1537/mi3099 4/mu1254913665/mv2341” and the leaflet “Preliminary Datasheet Sunweb” which can be downloaded from that website and F. Clement et al., “Industrially feasible multi-crystalline metal wrap through (MWT) silicon solar cells exceeding 16% efficiency”, Solar Energy Materials & Solar Cells 93 (2009), pages 1051-1055). MWT silicon solar cells represent a special type of silicon solar cells; they are back contact cells allowing for less front-side shadowing than standard silicon solar cells.
Just like in case of the standard silicon solar cells mentioned above, MWT silicon solar cells can be produced as MWT silicon solar cells having a p-type silicon base or, in the alternative, as MWT silicon solar cells having an n-type silicon base.
The silicon wafers of MWT silicon solar cells with an n-type silicon base are provided with small holes forming vias between the front- and the back-side of the cell. MWT silicon solar cells having an n-type silicon base have a p-type emitter extending over the entire front-side and the inside of the holes. The p-type emitter is covered with a dielectric passivation layer which serves as an ARC (antireflective coating) layer, as is conventional for silicon solar cells. Whereas the p-type emitter extends not only over the entire front-side but also over the inside of the holes, the dielectric passivation layer does not and leaves out the inside of the holes and, optionally, also a narrow rim around the front-edges of the holes. The inside of the holes and, if present, the narrow rim around the front-edges of the holes, i.e. the p-type diffusion layer not covered with the dielectric passivation layer, is provided with a metallization either in the form of a conductive metal layer (open hole) or in the form of a conductive metal plug (hole filled with conductive metal). The metallizations of the holes are typically applied from one or two conductive metal pastes and fired. To avoid misunderstandings, if two different conductive metal pastes are used, they are not applied so as to form a double-layer metallization; rather, one conductive metal paste is applied to the holes from the front-side thereof and the other from the back-side. The metallizations of the holes serve as emitter contacts and form anodic back contacts of the MWT silicon solar cell. In addition, the front-side of the MWT silicon solar cell is provided with a front-side metallization in the form of thin conductive metal collector lines which are arranged in a pattern typical for MWT silicon solar cells, for-example, in a grid- or web-like pattern or as thin parallel finger lines. The term “pattern typical for MWT silicon solar cells” means that the terminals of the collector lines overlap with the metallizations of the holes and are thus electrically connected therewith. The collector lines are applied from a conductive metal paste having fire-through capability. After drying the collector lines so applied they are fired through the front-side dielectric passivation layer thus making contact with the front surface of the silicon substrate.
The term “metal paste having fire-through capability” used in the description and the claims means a metal paste which etches and penetrates through (fires through) a passivation or ARC layer during firing thus making electrical contact with the surface of the silicon substrate. It is also true, that a metal paste having poor or even no fire-through capability behaves contrarily; it does not fire through a passivation or ARC layer and makes no electrical contact with the silicon substrate upon firing. To avoid misunderstandings; in this context the term “no electrical contact” shall not be understood absolute; rather, it shall mean that the contact resistivity between fired metal paste and silicon surface exceeds 1 Ω·cm2, whereas, in case of electrical contact, the contact resistivity between fired metal paste and silicon surface is in the range of 1 to 10 mΩ·cm2.
The contact resistivity can be measured by TLM (transfer length method). To this end, the following procedure of sample preparation and measurement may be used: A silicon wafer having an ARC or passivation layer (for example, a 75 nm thick SiNx layer) is screen printed on that layer with the silver paste to be tested in a pattern of parallel lines (for example, 127 μm wide and 6 μm thick lines with a spacing of 2.2 mm between the lines) and is then fired with the wafer reaching a peak temperature of, for example, 800° C. The fired wafer is laser-cutted into 10 mm by 28 mm long strips, where the parallel lines do not touch each other and at least 6 lines are included. The strips are then subject to conventional TLM measurement at 20° C. in the dark. The TLM measurement can be carried out using the device GP 4-Test Pro from GP Solar.
The back-side of a MWT silicon solar cell having an n-type silicon base is provided with cathodic conductive metal collector back contacts, which are in any case electrically insulated from the metallizations of the holes. The photoelectric current is collected from the anodic back contacts and the cathodic conductive metal collector back contacts of the MWT silicon solar cell.
Similar to the production of a silicon solar cell of the reverse type mentioned above, the production of a MWT silicon solar cell having an n-type silicon base starts with the formation of an n-type silicon substrate in the form of a silicon wafer. To this end, an n-doped base is typically formed via thermal diffusion of a phosphorus containing precursor such as POCl3 into the silicon wafer. Typically, the silicon wafers have a thickness in the range of, for example, 140 to 220 μm and an area in the range of, for example, 150 to 400 cm2. Small holes forming vias between the front- and the back-side of the wafer are applied, typically by laser drilling. The holes so produced are, for example, 30 to 250 μm in diameter, and they are evenly distributed over the wafer. Their number lies in the range of, for example, 10 to 100 per wafer. The holes so produced are evenly distributed over the wafer and their number lies in the range of, for example, 10 to 100 per wafer. Then a p-type diffusion layer is formed, typically via thermal diffusion of a boron containing precursor such as BBr3. The p-type diffusion layer is formed over the entire front-surface of the silicon substrate including the inside of the holes. The p-n junction is formed where the concentration of the n-type dopant equals the concentration of the p-type dopant. The cells having the p-n junction close to the sun side, have a junction depth between 50 and 500 nm. After formation of the diffusion layer, excess surface glass is removed from the emitter surface by etching, in particular, in a strong acid like, for example, hydrofluoric acid. Typically, a dielectric layer, for example, of TiOx, SiOx, TiOx/SiOx, SiNx or, in particular, a dielectric stack of SiNx/SiOx is then formed on the front-side p-type diffusion layer leaving out however the inside of the holes and, optionally, also a narrow rim around the front-side edges of the holes. Deposition of the dielectric may be performed, for example, using a process such as plasma CVD (chemical vapor deposition) in the presence of hydrogen or sputtering. The dielectric layer serves as both an ARC and passivation layer for the front-side of the MWT silicon solar cell.
Just like a conventional solar cell structure with an n-type base, MWT silicon solar cells having an n-type base typically have a positive electrode on their front-side and a negative electrode on their back-side. The positive front electrode takes the form of thin conductive collector lines arranged in a pattern typical for MWT silicon solar cells. The thin conductive collector lines are typically applied by screen printing, drying and firing a front-side conductive metal paste (front electrode forming conductive metal paste) on the ARC layer on the front-side of the cell, whereby the terminals of the collector lines overlap with the metallizations of the holes to enable electric connection therewith. Firing is typically carried out in a belt furnace for a period of 1 to 5 minutes with the wafer reaching a peak temperature in the range of 700 to 900° C.
As already mentioned, the holes of the silicon wafers of the MWT silicon solar cells are provided with metallizations. To this end, the holes themselves are metallized by applying conductive metal paste to the holes, either in the form of a conductive metal layer (open holes) or in the form of conductive metal plugs (holes filled with conductive metal). The metallizations may cover only the inside of the holes or also a narrow rim around the edges of the holes, whereby the narrow rim may be present on the front-side edges of the holes, on the back-side edges of the holes or on both. The metallizations may be applied from one single conductive metal paste. It is also possible to apply the metallizations from two different conductive metal pastes, i.e. one conductive metal paste may be applied to the front-side of the holes and the other to their back-side. After application of the one or two conductive metal pastes it is/they are dried and fired to form emitter contacts and, respectively, anodic back contacts of the MWT silicon solar cell. Firing is typically carried out in a belt furnace for a period of 1 to 5 minutes with the wafer reaching a peak temperature in the range of 700 to 900° C. The fired metallizations of the holes are in electric connection with the terminals of the thin front-side conductive collector lines.
In addition, a back-side silver paste is applied, typically screen printed, and successively dried on the back-side of the n-type silicon substrate avoiding any contact with the metallizations of the holes. In other words, the back-side silver paste is applied ensuring that it stays electrically insulated from the metallizations of the holes prior to as well as after firing. The back-side silver paste is applied evenly distributed over the back-side of the n-type silicon substrate. The dried back-side silver paste is then transformed by firing to become evenly distributed cathodic silver back collector contacts. Firing is typically carried out in a belt furnace for a period of 1 to 5 minutes with the wafer reaching a peak temperature in the range of 700 to 900° C. The front anode, the metallizations of the holes and the back cathodes can be fired sequentially or cofired. The silver back collector contacts account only for a small area of the back-side of the n-type silicon substrate. In addition, the front-side conductive metal paste applied as thin collector lines fires through the ARC layer during firing, and is thereby able to electrically contact the front-side p-type emitter.